1. Field of the Invention
The present invention relates to a lithography process, and more particularly to a method of designing a pattern of an integrated circuit capable of enhancing the yield of a wafer or mask in lithography process narrow in window, a method of manufacturing an exposure mask, an exposure mask applicable in lithography process narrow in window, and a method of manufacturing an integrated circuit device.
2. Description of the Related Art
As the integrated circuit is more and more reduced in size recently, it is required to form a pattern of an integrated circuit of shorter design dimension than the wavelength of exposure light when transferring the pattern, on a wafer at a high precision. For example, from the generation of pattern design dimension of 110 nm, ArF excimer laser (wavelength: λ=193 nm) is introduced. As a result, this ArF lithography process is executed in about a half size of the wavelength of exposure light. That is, the preliminary condition is the process of forming an integrated circuit in the environment of narrow margin (window) in the lithography process. As the necessity for this narrow lithographic margin process increases, fluctuations of a specification value of an exposure mask are causing greater effects on the lithography process.